1. Field of the Invention
The present invention relates to a light emission element using a polycrystalline semiconductor material of III-V group compound and manufacturing method therefor.
2. Related Background Art
Traditionally, there have been applications of polycrystalline semiconductor material as given below.
(1) As to the polycrystalline semiconductor materials of IV group compound, Si polycrystal is applicable to solar cells and thin film transistors. PA1 (2) As to the polycrystalline semiconductor materials of II-VI group compound, Cd polycrystal is applicable to thin film transistors and photosensors. Also, it is being applied to solar cells. Here, Zn polycrystal is applicable to EL (electroluminescence) elements, phosphores, piezoelectric elements, and the like. Further, chalcopyrite polycrystal such as CuInSe.sub.2 is being applied to solar cells. PA1 (3) As to the polycrystalline semiconductor materials of III-V group compound, Ga and In polycrystals are under study for its applications to solar cells. However, they have not been put into practice as yet. Also, there are many documents available as regards the solar cells using the polycrystalline semiconductor materials of III-V group compound, but the reports on the light emission characteristics are just a few. Also, while SALERNO JP et al. reported on the electron beam luminescence (see conf. RECIEEE vol. 15th pp. 1174-1178), there is no description of research on the characteristics of LED (light emitting diode) using PN junction. PA1 a non-nucleation surface deposition process for depositing a non-nucleation surface 511 on a substrate 510 by a thermal oxidation treatment, deposition, sputtering, or the like, and a nucleation surface formation process (A) for forming a polycrystalline deposition nucleation surface 512 by removing the unwanted nucleation surface with a wet etching by acid, alkali, or some other solution or by a dry etching with a reaction beam etching (RIBE) or the like subsequent to deposition on the non-nucleation surface 511 by an E deposition, resistive thermal deposition, or sputtering the nucleation surface being composed of the non-monocrystalline substance of Al.sub.2 O.sub.3, Ta.sub.2 O.sub.5, PA1 a semiconductor polycrystalline layer formation process (B) for forming sequentially an n type semiconductor polycrystalline layer 515 composed of a polycrystalline semiconductor material of III-V group compound and a p type semiconductor polycrystalline layer 516 by utilizing the difference between the densities of the non-nucleation surface 511 and the polycrystalline deposition nucleation surface 512 by MOCVD (organometal chemical vapor deposition) method with the polycrystalline deposition nucleation surface 512 as its starting point; PA1 a first electrode formation process (C) for forming the first electrode 517 on half the surface of the p type semiconductor polycrystalline layer 516 on the right-hand side from its center by a resistance thermal deposition method or electron beam thermal deposition method; PA1 a semiconductor polycrystalline layer removal process (D) for removing half the p type semiconductor polycrystalline layer 516 on the left-hand side from its center, where no resist 518 is coated, by the wet etching or dry etching after the resist 518 has been coated on the surface of the first electrode 517, so that the surface of the n type semiconductor polycrystalline layer 515 on this portion is allowed to be exposed; and PA1 a second electrode formation process (E) for forming the second electrode 519 on the exposed surface of the n type semiconductor polycrystalline layer 515 in the same manner as in the case of the first electrode 517 formation.
In general, displays using light emission elements are structured in such a way that many light emission elements are formed on a monocrystalline wafer, and one or a plurality of light emission elements are cut off from the monocrystalline wafer for bonding the cut-off light emission element or elements to a supporting substrate. Accordingly, if a large-area LED display element should be formed, many LEDs are hybridized, leading to a high cost. Hence there is a disadvantage in that its use is rather limited.
Therefore, in order to release the restraint on the display area of LED display elements, the present inventor et al have proposed a selective nucleation method as a method for forming large area semiconductor monocrystals of III-V group compound (Japanese Patent Laid-Open Application No. 64-723). This method is such that a non-nucleation surface having a small nucleation density, and a nucleation surface having an area small enough to deposit crystals composed of only single nuclei and a nucleation density larger than that of the non-nucleation surface as well are arranged adjacently on a substrate having a free surface, and then monocrystals are deposited from the single nuclei by performing a crystal deposition treatment on this substrate.
Also, the present inventor et al have proposed a method disclosed in European Patent Laid-Open Application No. EP0285358A2.
According to the disclosure, this method is such that when the aforesaid mono-crystals are formed, PN junction area is produced by switching the crystal formation processing conditions to form LEDs on a non-monocrystalline substrate.
Further, the present inventor et al have proposed a selective semiconductor element formation method by polycrystals (Japanese Patent Laid-Open Application No. 2-303394).
FIGS. 49A through 49E are views showing the fabrication processes of a manufacturing method for a light emission element using polycrystalline semiconductor material of III-V group compound on the basis of the selective semiconductor formation method by polycrystals which has been proposed by the present inventor et al.
The general processes for this manufacturing method will be as given below.
However, as a result of experiments on the light emission elements fabricated by the above-mentioned selective semiconductor element formation method by polycrystals, it has been found that while the light emission efficiency becomes greater as the grain sizes of the polycrystals of the n type semiconductor polycrystalline layer 515 and p type semiconductor polycrystalline layer 516 become larger, the surface irregularities and the height of the crystal islands become greater, and that the wirings between the first and second electrodes 517 and 519 tend to be damaged. Also, it has been found that there may be some cases where the reliability is lowered due to the disconnection of the electrodes if the grain size of the polycrystals is made larger in order to make the light emission efficiency greater, hence leaving a room for improvements in this respect.